參數(shù)資料
型號： M30100F3TFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP32
封裝： PLASTIC, LQFP-32
文件頁數(shù)： 3/163頁
文件大小： 2767K
代理商： M30100F3TFP
Serial I/O
Under
development
Tentative Specifications REV.E1
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
100
UARTi transmit/receive mode register
Symbol
Address
When reset
UiMR(i=0,1)
00A016, 00A816
0016
b7 b6
b5
b4
b3
b2
b1 b0
Bit name
Bit
symbol
W
R
Must be fixed to 001
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
b2 b1 b0
CKDIR
SMD1
SMD0
Serial I/O mode select bit
SMD2
Internal/external clock
select bit
STPS
PRY
PRYE
Parity enable bit
0 : Internal clock
1 : External clock
Stop bit length select bit
Odd/even parity select bit
0 : One stop bit
1 : Two stop bits
0 : Parity disabled
1 : Parity enabled
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
b2 b1 b0
0 : Internal clock
1 : External clock
Invalid
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
Invalid
Function
(During UART mode)
Function
(During clock synchronous
serial I/O mode)
UARTi transmit/receive control register 0
Symbol
Address
When reset
UiC0(i=0,1)
00A416, 00AC16
0816
b7
b6
b5
b4
b3
b2 b1
b0
Function
(During UART mode)
W
R
Function (Note)
(During clock synchronous
serial I/O mode)
TXEPT
CLK1
CLK0
NCH
CKPOL
BRG count source
select bit
Transmit register empty
flag
0 : Transmit data is output at
falling edge of transfer clock
and receive data is input at
rising edge
1 : Transmit data is output at
rising edge of transfer clock
and receive data is input at
falling edge
CLK polarity select bit
Data output select bit
0 0 : f1 is selected
0 1 : f8 is selected
1 0 : f32 is selected
1 1 : fc is selected
b1 b0
0 : LSB first
1 : MSB first
0 : Data present in transmit
register (during transmission)
1 : No data present in transmit
register (transmission
completed)
0 : TXDi pin is CMOS output
1 : TXDi pin is N-channel
open-drain output
UFORM Transfer format select bit
0 0 : f1 is selected
0 1 : f8 is selected
1 0 : f32 is selected
1 1 : fc is selected
b1 b0
0 : Data present in transmit register
(during transmission)
1 : No data present in transmit
register (transmission completed)
0: TXDi pin is CMOS output
1: TXDi pin is N-channel
open-drain output
Must always be “0”
Bit name
Bit
symbol
Must always be “0”
O
Must set to "0".
(Note)
Note: Set the corresponding port direction register to “0”.
0
Reserved bit
Nothing is assigned.
In an attempt to write to this bit, write "0". The value, if read, turns out to be "0".
Reserved bit
Must always be set to “0”
Figure 1.15.4. Serial I/O-related registers (2)
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