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參數(shù)資料
| 型號： | MC68332GMFV20 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 20 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | QFP-144 |
| 文件頁數(shù)： | 245/265頁 |
| 文件大?。?/td> | 6905K |
| 代理商： | MC68332GMFV20 |
SYSTEM INTEGRATION MODULE
MC68332
4-40
USER’S MANUAL
Figure 4-15 Data Bus Mode Select Conditioning
Data bus mode select current is specified in APPENDIX A ELECTRICAL CHARAC-
for more information.
DATA0 determines the function of the boot ROM chip-select signal (CSBOOT). Unlike
other chip-select signals, CSBOOT is active at the release of reset. During reset ex-
ception processing, the MCU fetches initialization vectors beginning at address
$000000 in supervisor program space. An external memory device containing vectors
located at these addresses can be enabled by CSBOOT after a reset. The logic level
of DATA0 during reset selects boot ROM port size for dynamic bus allocation. When
DATA0 is held low, port size is eight bits; when DATA0 is held high, either by the weak
internal pull-up driver or by an external pull-up, port size is 16 bits. Refer to 4.8.4 Chip-
for more information.
DATA1 and DATA2 determine the functions of CS[2:0] and CS[5:3], respectively. DA-
TA[7:3] determine the functions of an associated chip select and all lower-numbered
chip-selects down through CS6. For example, if DATA5 is pulled low during reset,
CS[8:6] are assigned alternate function as ADDR[21:19], and CS[10:9] remain chip-
selects. Refer to 4.8.4 Chip-Select Reset Operation for more information.
DATA8 determines the function of the DSACK[1:0], AVEC, DS, AS, and SIZE pins. If
DATA8 is held low during reset, these pins are assigned to I/O port E.
DATA9 determines the function of interrupt request pins IRQ[7:0] and the clock mode
select pin (MODCLK). When DATA9 is held low during reset, these pins are assigned
to I/O port F.
DATA11 determines whether the SIM operates in test mode out of reset. This capabil-
ity is used for factory testing of the MCU.
DATA BUS MODE DECODE
RESET
R/W
MODE SELECT
LINES
DS
VDD VDD
DATA15
DATA1
DATA0
*
*Optional, to prevent conflict on RESET negation.
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Freescale Semiconductor, Inc.
For More Information On This Product,
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68332GMFVV20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| MC68332GVAG16 | 功能描述:32位微控制器 - MCU 32B MCU 2KRAM TPU QSM RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| MC68332GVAG25 | 功能描述:32位微控制器 - MCU 32B MCU 2KRAM TPU QSM RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| MC68332GVEH20 | 功能描述:32位微控制器 - MCU 32B MCU 2KRAM TPU QSM RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| MC68332GVEH25 | 功能描述:32位微控制器 - MCU 32B MCU 2KRAM TPU QSM RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
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