
Samsung ASIC
4-97
STD150
PvOB1/2/4/8/12_ABB
Analog Normal Output Buffers with Separate Bulk-Bias
Switching Characteristics
(Typical process, 25
°
C, 1.2V, 3.3V, t
R
/t
F
=0.11ns, CL: Capacitive Load[pF])
PHOB8_ABB
PHOB12_ABB
Path
Parameter
Delay [ns]
CL = 50.0pF
4.102
4.100
2.414
2.407
<
Delay Equations [ns]
Group1*
0.248 + 0.077*CL
0.213 + 0.078*CL
0.672 + 0.035*CL
0.516 + 0.038*CL
Group2*
0.239 + 0.077*CL
0.241 + 0.077*CL
0.682 + 0.035*CL
0.530 + 0.038*CL
Group3*
0.240 + 0.077*CL
0.275 + 0.077*CL
0.691 + 0.035*CL
0.554 + 0.037*CL
A to PAD
tR
tF
tPLH
tPHL
*Group1 : CL < 50, *Group2 : 5 =
Path
Parameter
Delay [ns]
CL = 50.0pF
2.820
2.783
1.978
1.864
<
Delay Equations [ns]
Group1*
0.296 + 0.050*CL
0.216 + 0.051*CL
0.801 + 0.024*CL
0.608 + 0.025*CL
Group2*
0.272 + 0.051*CL
0.204 + 0.052*CL
0.816 + 0.023*CL
0.608 + 0.025*CL
Group3*
0.253 + 0.051*CL
0.216 + 0.051*CL
0.824 + 0.023*CL
0.616 + 0.025*CL
A to PAD
tR
tF
tPLH
tPHL
*Group1 : CL < 50, *Group2 : 5 =